Introduction
The widespread adoption of portable computing and communication devices has accelerated the demand for high-density and low-power nonvolatile memory. RAM can be compared to a person's short-term memory and the hard disk to the long-term memory. The short-term memory focuses on work at hand, but can only keep so many facts in view at one time. If short-term memory fills up, your brain sometimes is able to refresh it from facts stored in long-term memory. A computer also works this way. If RAM fills up, the processor needs to continually go to the hard disk to overlay old data in RAM with new, slowing down the computer's operation. Unlike the hard disk which can become completely full of data so that it won't accept any more, RAM never runs out of memory. It keeps operating, but much more slowly than you may want it to.
Dynamic random access memory (DRAM) is the most common kind of random access memory (RAM) for personal computers and workstations. Random access means that the PC processor can access any part of the memory directly rather than having to proceed sequentially from some starting place. Static RAM does not need refreshing because it operates on the principle of moving current that is switched in one of two directions rather than a storage cell that holds a charge in place. Static RAM is generally used for cache memory, which can be accessed more quickly than DRAM. DRAM stores each bit in a storage cell consisting of a capacitor and a transistor. Capacitors tend to lose their charge rather quickly; thus, the need for recharging. A variety of other RAM interfaces to the computer exist. These include:
overcome the disadvantages caused SRAM and DRAM and the widespread adoption of portable computing and communication devices has accelerated the demand for high-density and low-power nonvolatile memory. For developing high density and low power non-volatile memory leads to the use of thin magnetic layers instead of electric charges for storage. Hence it resulted in the development of Magnetic Random Access Memory(MRAM).MRAM is a universal memory with the high speed property of DRAM, less power consumption of SRAM and non volatile nature of flash memory.
In current-generation computers, the operating system and all application software are stored on the hard disk. When a computer is powered up, it loads a working copy of the operating system along with any other start-up software to the DRAM, from which the data can be quickly accessed by the microprocessor. This boot-up process can take several minutes. MRAM devices, on the other hand, retain data without using electricity. Because working copies of the operating system and other applications can be stored on MRAM, it eliminates the need for lengthy boot-up times.
What happens when the power goes out while you're typing on your computer? Unless you are connected to an uninterruptible power supply, you lose everything you were working on since you last saved the document. That's because your computer's random access memory (RAM), which stores information for fast access, can't function without power. The same goes for your cellphone and PDA. Both require a battery to keep the RAM intact with your phone numbers and personal data. But IBM researchers have developed a new form of RAM — magnetic RAM (MRAM) — that doesn't forget anything when the power goes out.
Unlike conventional RAM, which uses electrical cells to store data, MRAM uses magnetic cells. This method is similar to the way your hard drive stores information. When you remove power from your computer, conventional RAM loses memory, but the data on your hard disk remains intact due to its magnetic orientation, which represents binary information. Because magnetic memory cells maintain their state even when power is removed, MRAM possesses a distinct advantage over electrical cells.
2 Technical Description
2.1 Magnetoresistive(MR)
Development of MRAM deals with the developments of 2 fields,the magnetic and semiconductor technology. Basic structure of MRAM is a magnetoresistive material. Magnetoresistive material consists of 2 ferromagnetic layers separated by a conductor or an insulator .
2.2 Magnetic Tunneling Junction(MTJ)
A magnetoresistive material which consists of 2 ferromagnetic layers of cobalt iron separated by a thin insulating layer of aluminium oxide is Magnetic Tunneling Junction(MTJ).The insulating layer is so thin that the electrons can tunnel through the barrier if a bias voltage is applied between the two electrodes. In MTJs the tunneling current depends on the relative orientation of magnetizations of the two ferromagnetic layers, which can be changed by an applied magnetic field. This phenomenon is called tunneling magnetoresistance
2.2.1 Tunneling Magnetoresistance (TMR)
Tunneling Magnetoresistance Tunneling magnetoresistance (TMR) is a dramatic change of the tunneling current in magnetic tunnel junctions when relative magnetizations of the two ferromagnetic layers change their alignment. TMR can be interpreted in terms of Julliere's model, which is based on two assumptions.
First, it is assumed that spin of electrons is conserved in the tunnelling process. It follows, then, that tunnelling of up- and down-spin electrons are two independent processes, so the conductance occurs in the two independent spin channels. According to this assumption, electrons originating from one spin state of the first ferromagnetic film are accepted by unfilled states of the same spin of the second film. If the two ferromagnetic films are magnetized parallel, the minority spins tunnel to the minority states and the majority spins tunnel to the majority states. If, however, the two films are magnetized antiparallel the identity of the majority- and minority-spin electrons is reversed, so the majority spins of the first film tunnel to the minority states in the second film and vice versa.
Second, it is assumed that the conductance for a particular spin orientation is proportional to the product of the effective density of states of the two ferromagnetic electrodes. According to these two assumptions, the tuneling current for the parallel and antiparallel alignments and the TMR can be written as follows: Julliere's model was used to estimate the magnitude of TMR in magnetic tunnel junctions from the known values of the spin polarization of ferromagnets obtained in experiments on superconductors.
2.2.2 Review of MTJ Device Operation
An MTJ is a magnetoresistive device whose resistance can be altered by an applied magnetic field. A binary data ‘1’ or ‘0’ is stored in the MTJ device by respectively altering its resistance to ‘high’ or ‘low’. No static power is required to maintain this resistance (state).
3 MRAM architecture
3.1 Cross point architecture
MRAM has been under development for roughly 15 years. During that time, the magnetoresistive technology that has been used in the design concepts . The basic application of MTJ is MRAM. The basic concept of MRAM is to use the magnetization direction in MTJ for information storage."0" and "1" correspond to the parallel and antiparallel magnetizations in a MTJ.The information bits can be written by passing current through a MTJ and they can be read out by measuring the resitance difference.
In order to pass current ,the wires are kept close and not connected to the magnetic cells(MTJs).And this arrangement of wires and cells forms the cross-point architecture.
3.2 Write Operation
A current is passed through the two independent wires (one above and one below) that intersect at that particular cell. Each point where the bottom and top lines cross represents a bit. Only the cell at the cross point of the two wires changes state (resistance).
During the write operation ,a current is passed through the two independent wires that intersect at a particular point and the information storage of "0" and "1" correspond to the parallel and anti parallel magnetizations in a MTJ. The information bits can be written by passing current through the cross point architecture.
3.3 Read Operation
During the write operation ,a current is passed through the two independent wires that intersect at a particular point and the information storage of "0" and "1" correspond to the parallel and anti parallel magnetizations in a MTJ. The information bits can be written by passing current through the cross point architecture and they can be read out by measuring the resitance difference.For this we have to select the particular MTJ that is to be read to determine the information stored.
3.4 SDT cell
High write current requirements put limitations on the cell and memory size and affect the reliability of the memory. From a current steering standpoint, as needed to direct the write currents to the appropriate cell, relatively large transistors are required in order to handle the high write current. Compared to a traditional memory, these write transistors take up a disproportionate fraction of the die size and lead to a larger die. In array layout, the size of this write transistors can limit the pitch of the rows and/or columns.
Finally, the overall memory current, when a byte wide, or larger, write operation is required, can become quite large if the write current for a single cell is large. This total chip current, compared to traditional memories, can make the memory unattractive, especially in low power and battery operated applications. Issues with cell uniformity generally stem from the cell design and mode of operation.
3.5 SSDT CELL
The SSDT memory cell addresses the issues of high power and half-select disturbs through a unique bit structure and the use of a second select transistor in the memory cell. The anti ferromagnetically coupled sandwich film that is used as the storage (free) layer in the SSDT bit requires significantly less current to switch than is required in the popular cell that is shown in Figs. 3.6and 3.7. This structure is also immune to disturbs by the external fields that are generated by on-chip current conductors. Also, with only a single write current, that is selectively passed through only a single cell, half-select conditions are eliminated. In a traditional, single free layer, SDT bit, the switching magnetization is uncompensated. Consider the switching sequence that is illustrated in Fig. 3.8. In response to external magnetic fields, the magnetization rotates to being parallel with the narrow dimension of the bit and a high demagnetization field is created - tending to resist the rotation, or switching, of the film. Relatively large fields are required to overcome this high energy state and switch the bit. This requires large write currents.
The sandwich free layer in the SSDT bit contains two magnetic layers that are separated by a non-magnetic layer. If the non-magnetic layer is a thin ruthenium film, then the magnetic layers will be strongly antiferromagnetically coupled. Because of this strong coupling, the two magnetic films will remain anti-parallel, even during switching. Thus, the demagnetization field that is generated by one layer is compensated by an opposite demagnetization layer that is generated by the other layer. As shown in Fig. 3.7, only a very minimal net demagnetization field is created, for each layer, as the magnetizations of the pair of films rotates to being parallel with the short axis of the bit. Only a small field is required to overcome this lower energy rotation state – so a smaller current is able to switch this sandwich film. Empirical data shows that only a 4 mA write current in a 2 µm wide device is required for switching. This data agrees with a theoretical model, that predicts that an 0.6 µm wide device will switch with a 0.8 mA write current. Because of the antiferromagnetic coupling in the sandwich film, keeping the magnetizations of the two layers antiparallel to each other, the magnetic state of the sandwich is not sensitive to external fields. Thus, the SSDT memory is immune to external fields as would normally be encountered in use - eliminating the need for magnetic shielding. Since external fields don’t affect the sandwich, the SSDT bit is written by passing a current through the sandwich film. This current generates fields that are in opposite directions on the the top and bottom magnetic layers. It is these relatively small, internally generated magnetic fields that switch the bit between its two memory states.
With a single write current, that must pass through one of the SSDT layers, the SSDT cell is significantly different from the popular SDT cell that was shown in Figs.3.6 and 3.7. One notable difference is the absence of the digit line -the second, orthogonal write current is not needed in the SSDT cell. The other key difference is the inclusion of a second select transistor, that is used to steer the write current through the SSDT bit. These difference are illustrated in Fig. 3.8, which shows the write mode of the SSDT cell.
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